PIC Front-End Prototyping: Lithography and Precision Dry Etching
Photonic Integrated Circuits
Technical Scope and Capabilities
This service provides an integrated fabrication chain for prototyping active and passive photonic components on III-V or silicon-based platforms.
Patterning
The service provides
- maskless direct writing using Heidelberg DWL66+ for flexible experimental designs with critical dimension of approximately 800 nm
- mask alignment using SUSS MA/BA6 Gen4 with high-precision 1:1 projection, supporting 1 micrometre resolution for wafers up to 150 mm.
Sausasis ėsdinimas
The service provides
- ICP-RIE using PlasmaPro 100 Cobra for high-precision etching of III-V compound semiconductors with chlorine-based Cl₂ and BCl₃ chemistries and CH₄ chemistries, with laser endpointing
- RIE using PlasmaPro 80 for etching dielectric layers such as SiO₂ and Si₃N₄.
Infrastructure
Processes are performed in integrated cleanroom zones meeting ISO 5 for lithography and ISO 7 for etching.
Target Audience and Possible Clients
The service is intended as a first entry point for users requiring rapid prototyping of advanced semiconductor solutions. Possible clients include
- start-ups validating photonic designs from laboratory to prototype phase
- SMEs in electronics and photonics seeking to innovate without high upfront infrastructure costs
- academic institutions requiring high-precision fabrication for R&D projects or collaborative technological experiments.
Service Delivery Mode
The service delivery modes are
- small-batch prototyping for low-volume production or validation
- training for industry engineers on equipment operation.
Service Delivery Terms and Times
A mandatory technology testing plan is developed for each client, explicitly defining the scope, timing and technical milestones of the prototyping run.
Possible Restrictions
The service is limited to small-batch prototyping and research. It is not intended for mass or high-volume manufacturing.